Keynote
Ali-Reza Adl-Tabatabai: Transactional Memory: From Semantics to Silicon
Sunday, 11 May 2008, 9.00am
Ali-Reza Adl-Tabatabai, PhD
Senior Principal Engineer,
Intel Programming Systems Lab
Abstract
Multi-core architectures bring parallel programming into the mainstream.
Parallel programming poses many new challenges to the developer, one of which is synchronizing concurrent access to shared memory by multiple threads. Programmers have traditionally used locks for synchronization, but locks have well-known pitfalls: Simplistic coarse-grained locking does not scale well, while more sophisticated fine-grained locking risks introducing deadlocks and data races. Furthermore, scalable libraries written using fine-grained locks cannot be easily composed in a way that retains scalability and avoids deadlock and data races. Transactional memory provides new synchronization constructs that alleviate many of the pitfalls of lock-based synchronization.
In this talk, I will present our recent work on transactional memory. I will describe the transactional memory stack we have developed at Intel's programming systems lab. This stack includes new transactional memory language constructs for C and Java, compiler optimizations for these constructs, and high-performance transactional memory runtimes. I will also describe how hardware acceleration can improve the performance of transactional memory. Finally, I will discuss the challenges we face in bringing transactional memory into the mainstream.
Bio
Ali-Reza Adl-Tabatabai is a Senior Principal Engineer in Intel's Programming Systems Lab. He leads a team of researchers working on compilers and scalable runtimes for future Intel Architectures. Ali has spent most of his career building high-performance programming language implementations, including static and dynamic optimizing compilers and language runtime systems. His current research concentrates on language features that make it easier for the mainstream developer to build reliable and scalable parallel programs for future multi-core architectures and on architectural support for those features. Most recently he has worked on transactional memory, a new concurrency control mechanism that avoids many of the pitfalls of lock-based synchronization. Ali holds 13 patents and has published over 20 papers in leading conferences and journals. He received his PhD in Computer Science from Carnegie Mellon University.